Organization of CMOS Memory - non-Clock  (Cont.)

 2Eh and 2Fh are as defined by the original IBM PC/AT specification and
 represent a byte-wise additive sum of the values in locations 10h-2Dh only,
 00h-0Fh and 30h-33h are not included. This definition is used by most
 clone manufacturers including AMI, Compaq, Tandon, NEC, and Zenith. The
 IBM PS/2 line does not follow this standard with the range 19h-31h being
 undefined.

 30h - Extended Memory in K, Low Byte

 31h - Extended Memory in K, High Byte
 (??? this appears to mirror the value in bytes 17h-18h.)

 32h - Century Byte (BCD value for the century - currently 19)
 32h - (IBM-PS2) Configuration CRC low byte. CRC for range 10h-31h

 33h - Information Flag
  Bit 7 128K (??? believe this indicates the presence of the special 128k
              memory expansion board for the AT to boost the "stock" 512k
              to 640k - all machines surveyed have this bit set)
  Bits 6-0 ???
 33h - (IBM PS/2) Configuration CRC high byte (see entry for 32h)
 33h - (PHOENIX) Bit 4 (000x 0000) bit 4 from Intel CPU register CP0

 34h - (AMI) Shadowing & Boot Password
  Bits 7-6 Password Selection
   00b Disable 10b Reserved
   01b Set     11b Boot
  Bit 5 C8000h Shadow ROM (Bit 1 = On)
  Bit 4 CC000h Shadow ROM (Bit 1 = On)
  Bit 3 D0000h Shadow ROM (Bit 1 = On)
  Bit 2 D4000h Shadow ROM (Bit 1 = On)
  Bit 1 D8000h Shadow ROM (Bit 1 = On)
  Bit 0 DC000h Shadow ROM (Bit 1 = On)

 35h - (AMI) Shadowing
  Bit 7 E0000h Shadow ROM (Bit 1 = On)
  Bit 6 E4000h Shadow ROM (Bit 1 = On)
  Bit 5 E8000h Shadow ROM (Bit 1 = On)
  Bit 4 EC000h Shadow ROM (Bit 1 = On)
  Bit 3 F0000h Shadow ROM (Bit 1 = On)
  Bit 2 C0000h Shadow ROM (Bit 1 = On)
  Bit 1 C4000h Shadow ROM (Bit 1 = On)
  Bit 0 Reserved
 35h - (PHOENIX) Second user defined hard disk (type 48) Cylinders LSB
       NOTE: used only when PS/2 style password is NOT in effect.

 36h - (PHOENIX) Second user defined hard disk (type 48) Cylinders MSB
       NOTE: used only when PS/2 style password is NOT in effect.

 37h - (IBM PS/2) Date Century Byte
 37h - (PHOENIX) Second user defined hard disk (type 48) # of heads
       NOTE: used only when PS/2 style password is NOT in effect.

 38h-3Dh (AMI) Encrypted Password

 38h-3Fh ??? (IBM PS/2) Encrypted Password. Initialized to 00h in all
     bytes. Will accept from 1-7 scan codes.

 38h - (PHOENIX) Second user defined hard disk (type 48) Write Precomp. LSB
       NOTE: used only when PS/2 style password is NOT in effect.

 39h - (PHOENIX) Second user defined hard disk (type 48) Write Precomp. MSB
       NOTE: used only when PS/2 style password is NOT in effect.

 3Ah - (PHOENIX) Second user defined hard disk (type 48) Parking Zone LSB
       NOTE: used only when PS/2 style password is NOT in effect.

 3Bh - (PHOENIX) Second user defined hard disk (type 48) Parking Zone MSB
       NOTE: used only when PS/2 style password is NOT in effect.

 3Ch - (PHOENIX) Second user defined hard disk (type 48) Sectors per track
       NOTE: used only when PS/2 style password is NOT in effect.

 3Eh - (AMI) Extended CMOS Checksum, High Byte (includes 34h - 3Dh)

 3Fh - (AMI) Extended CMOS Checksum, Low Byte (includes 34h - 3Dh)

 End of original 64 CMOS RAM bytes. Many modern chips now contain 128
 bytes and the IBM PS/2 has provision for 2k of "Expansion CMOS".
 The AMI HI-FLEX description is below. If the chip does have only
 64 bytes, addresses will wrap so that requests for bytes 40h-7Fh will
 return the same values as 00h-3Fh.

 40h ???

 41h - (AMI)
  Bits 7-6 IOR/IOW Wait states
  Bits 5-4 16-bit DMA Wait States
  Bits 3-2  8-bit DMA Wait States
  Bit 1    EMR bit
  Bit 0    DMA Clock Source

 42h-43h ???

 44h - (AMI)
  Bit 4 NMI Power Fail Warning
  Bit 3 NMI Local Bus Timeout

 45h - (AMI)
  Bits 7-6 AT Bus 32-Bit Delay
  Bits 5-4 AT Bus 16-Bit Delay
  Bits 3-2 AT Bus 8-Bit Delay
  Bits 1-0 AT Bus I/O Delay

 46h - (AMI)
  Bits 7-6 AT Bus 32 Bit Wait States
  Bits 5-4 AT Bus 16 Bit Wait States
  Bits 3-2 AT Bus  8 Bit Wait States
  Bits 1-0 AT Bus Clock Source

 47h - 50h ???

 51h - (AMI)
  Bit 7    Bank 0/1 RAS Precharge
  Bit 6    Bank 0/1 Access Wait States
  Bits 3-2 Bank 0/1 Wait States

 52h ???

 53h - (AMI)
  Bit 7    Bank 2/3 RAS Precharge
  Bit 6    Bank 2/3 Access Wait States
  Bits 3-2 Bank 2/3 Wait States

 54h-7Fh ???


Revision History

v1.20  Sept, 1993      PHOENIX data from Wim Osterholt added
                        additional AMI data from Howie (hjh@gwd.dst.gov.au)
v1.15   June, 1993      AMSTRAD data updated
v1.1   June, 1993  AMSTRAD & PS/2 data added
v1.0   June, 1993  First release: Motorola MC 146818,  PC-AT & AMI